Yamaha MDX-9 Manuel de service Page 28

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MDX-E100
MDX-E100
27
No. Pin Name I/O
35 RAA7 O
36 RAA8 O
37 RAOEX O
38 DGND
39 RACASX O
40 RAD2 I/O
41 RAD3 I/O
42 RAA9 O
43 RARASX O
44 RAWEX O
45 RAD1 I/O
46 RAD0 I/O
47* TCRS O
48* ACRCER O
49* PLCK O
50 EFM0 O
51* X700KO O
52* EXPORT0 O
53* EXPORT1 O
54* TESO1 O
55 TEST3 I/O
56 TEST4 I/O
57 CDDATA I/O
58 CDLRCK I/O
59 CDBCLK I/O
60 VXI I
61* VPO O
62 VDD1
63 DGND
64 XI I
65 XO O
66 DIN I
67 DOUT O
68 VDD3
69 DGND
70 LRCK O
71 BCLK O
72 DFCK O
73 ADDATA I
74 DADATA O
75* FEMON O
76* TOTMON O
77* TEMON O
78 SBCK I
79 SBO O
80 SBSY O
81 SFSY O
82 FOK O
83 SENSE O
84 COUT O
85 MCCK O
86 DINTX O
87 VDD1
88 DGND
89 RSTX I
90 SYD0 I/O
91 - 96 SYD1 - SYD6 I/O
97 SYD7 I/O
98 SYWRX I
99 SYRDX I
100 SYRS I
The * marked terminal is a terminal which is not connected externally (open terminal).
(Note) Set RSTX to "L" when or after turning on the power supply.
IC1201 : LR376484
ATRAC Encoder/Decoder
Function
Address output to external D-RAM. ADR7
Address output to external D-RAM. ADR8
Data output enable signal output to external D-RAM
Ground terminal for digital section
Column address strobe signal output to external D-RAM
Data input/output with external D-RAM. D2
Data input/output with external D-RAM. D3 (MSB)
Address output to external D-RAM. ADR9
Low address strobe signal output to external D-RAM
Data write enable signal output to external D-RAM
Data input/output with external D-RAM. D1
Data input/output with external D-RAM. D0 (LSB)
Track cross signal
CRC error flag monitor output of ADIP
EFM PLL clock output during reproduction
EFM signal output during recording and C1F (C1 error flag) monitor output during reproduction
Clock output. f=705.6KHz. No clock output when RSTX=0.
Microporcessor expansion output port 0
Microprocessor expansion output port 1
Microprocessor expansion output port 2 when switching PLLLR.
Microprocessor expansion output port 3 when switching PLLOSC.
Microprocessor expansion output port 4 when switching EXTCLK.
CD data input for high speed dubbing. Microprocessor expansion output port 5 when switching.
CD LR clock input for high speed dubbing. Microprocessor expansion output port 6 when switching.
CD bit clock input for high speed dubbing. Microprocessor expansion output port 7 when switching.
PLL clock input for variable pitch.
PLL phase error output for variable pitch.
Power supply terminal for digital section
Ground terminal for digital section
Oscillation circuit input. 33.8688MHz
Oscillation circuit output. 33.8688MHz
Digital input signal
Digital output signal
Power supply terminal for internal PLL
Ground terminal for digital section
Output terminal for switching music data to Lch, Rch
Shift clock for music data
Clock for AD/DA converter digital filter. 256Fs
Voice data input
Voice data output
Focus error signal monitor output
Total signal monitor output
Tracking error signal monitor output
DIN sub-code reading clock. EIAJ CP-309 format
DIN sub-code serial data. EIAJ CP-309 format.
DIN sub-code block synchronous signal. EIAJ CP-309 format.
DIN sub-code frame synchronous signal. EIAJ CP-309 format.
Focus OK detect signal. "0": focus OK
Servo state detect signal. "1": Auto move, auto jump, auto focus being drawn in
Track cross signal output
Clock output for microprocessor. Clock output also when RSTX=0
Output terminal used to request interrupt into system control interface.
Power supply terminal for digital section
Ground terminal for digital section
Chip reset input. Reset at "L" (Note)
Data bus terminal of system control interface (LSB)
Data bus terminal of system control interface.
Data bus terminal of system control interface. (MSB)
Input terminal for register write pulse of system control interface
Input terminal for register read pulse of system control interface
Input terminal for register selection of system control interface
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